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電子專業(yè)英文簡歷

時(shí)間：2024-06-19 09:58:43 英文簡歷模板 我要投稿

電子專業(yè)英文簡歷模板

　　在現(xiàn)實(shí)生活中有很多人所從事的工資不是自己在大學(xué)時(shí)期所學(xué)習(xí)的專業(yè)，而在眾多的求職者中同樣也有很多人不行從事自己專業(yè)的對口行業(yè)，這也是的教育上的弊端之一。而在求職中相對來說對口的專業(yè)人才優(yōu)勢更大，那么跨專業(yè)的求職者在寫個(gè)人簡歷的時(shí)候就可以選擇技術(shù)型的個(gè)人簡歷，來突出自己具有的技能能力，對目標(biāo)職位的作用。

電子專業(yè)英文簡歷模板

　　有很多求職者在工作經(jīng)歷上因?yàn)樘啻蔚墓ぷ鳎堑荒茏鳛榍舐毜膬?yōu)勢，反而還是劣勢。工作更換的頻繁會讓用人單位留下不穩(wěn)定的印象，那么在的選人才的時(shí)候也不會輕易選中。這種情況下就不能按照時(shí)間的順序來的寫工作經(jīng)歷了，選功能型個(gè)人簡歷就可以有效的避免此方面的麻煩。

　　一般來說在個(gè)人簡歷中的教育背景是從最高學(xué)歷，逆時(shí)序來寫，比如說研究生學(xué)歷，接下來是本科學(xué)歷背景，然后是高中學(xué)歷背景，而如果中間不是連續(xù)性的，像是專科自考獲得本科學(xué)歷一般不再簡歷中體現(xiàn)，那么在編寫個(gè)人簡歷的時(shí)候，也不適合時(shí)序型，以功能性個(gè)人簡歷更為社會。

　　下面是yjbys小編和大家分享的電子專業(yè)英文簡歷模板，更多相關(guān)資訊請點(diǎn)擊(www.ruiwen.com/jianli)。

Name：yjbys Hukou： 
Residency：  Work Experience： 
Current Salary：  Tel： 
E-mail：www.ruiwen.com/jianli
Career Objective
Desired Industry： Electronics/Semiconductor/IC ,Science/Research ,Government ,Others ,Testing, Certification
Desired Position： Senior Hardware Engineer ,Semiconductor Technology, Branch Office Manager ,Chief Representative ,Research Specialist Staff
Desired address： Shanghai ,Hongkong ,Beijing ,Taiwan ,Macao Desired Salary： Negotiable
Work Experience
2006/06—Present ***Company
  Industry: Electronics/Semiconductor/IC
Intel Flash Engineering Department Individual Contributor
Responsibilities：
I have been working in Intel Flash Assembly & Test Engineering
Department as an Individual Contributor since June of 2006.
Being Leader of ATE Yield team, I have been working with the team members to improve the products yield. Our efforts are paid off:
  1. The yield of year 2006 has been dramatically increased than that of year 2005.
  2. The yield of all products, consecutively meets the goal.
  3. The total amount of cost saving due to yield improvement is more than $1 million compared with year 2005. Being the Leader of Board Repair Team in ATE, I worked with my team members, setup a set of new procedure to replace the current one, I defined the schedule, divided the roles & responsibilities among team members, follow up the progress. Finally, the team has made a great cost saving of $2.5M in 2007.
Report Directly to: Department ManagerNumber of Subordinate: 14
Reference: Bao Powel
Achievements: Being Leader of ATE Yield team, I have been working with the team members to improve the products yield.
Our efforts are paid off:
  1. The yield of year 2006 has been dramatically increased than that of year 2005.
  2. The yield of all products, consecutively meets the goal.
  3. The total amount of cost saving due to yield improvement is more than $1 million compared with year 2005. Being the Leader of Board Repair Team in ATE, I worked with my team members, setup a set of new procedure to replace the current one, I defined the schedule, divided the roles & responsibilities among team members, follow up the progress. Finally, the team has made a great cost saving of $2.5M in 2007.
2006/01—2006/05 Intel(Shanghai) Technology Development Ltd. Company
  Industry: Electronics/Semiconductor/IC
Intel STTD-China Department Electronics Development Engineer
Responsibilities：
  1. I had been working in STTD-China since Jan 2006 to May 2006 as a senior module engineer.
  2. At that time, as a main contributor of this project, we succeeded in developing a set of MASSIVELY PARALLEL CLASS TEST equipment, which is able to test more than 6700 units in one time.
Report Directly to: Hopman Mark   Number of Subordinate: 14
Reference: Bao Powel
Reason for Leaving: I was transferred to Intel（Shanghai）Products Ltd. Company due to the internal re-organization in June of 2006.
Achievements: As a main contributor of STTD-China department, I co-work with my colleagues to succeed in developing a set of MASSIVELY PARALLEL CLASS TEST equipment, which is able to test more than 6700 units in one cycle.
2005/05—2006/01 Nanyang University of Science & Technology
  Industry: Electronics/Semiconductor/IC
Electronics & Electrical Engineering Department Research Fellow
Responsibilities：
  1. I work in Electronics & Electrical Engineering Department of Nanyang University of Science & Technology as a Research Fellow.
  2. I majored at Gate Oxide Reliability Research in the duration.
Report Directly to: Professor Pey Kin Leoh 
Subordinate: 3
Reference: Patrick Low
Reason for Leaving: I completed the project which I undertook by myself, and want to do more challenging job.
Achievements: In less than one year, I made a lot of experiments and acquired the wonderful data for the project by myself.
Project Experience
2008/01—Present Assembly NPI (New Product Introduction)
  Project Description: To introduce more products into Intel Flash Assembly factory, I join Assembly NPI team and work as the team leader. I coordinate with IE, Planner, Marketing guy and Engineer to select new product items, do demo in factory, and then qualify it.
Responsibility: I am working as NPI Team leader and coordinate all team members, define the NPI candidate, make Assembly build plan, follow up the progress.
2007/01—2007/12 Marginal Electrical Boards Rescue
  Project Description: To rescue some electrical boards of testing equipment, a Task Force team was built up and led by me. We categorized each kind of board, made historical failure analysis on each kind of board and around &2.5 million dollars was saved finally.
Responsibility: Being the team leader, I took the job of data analysis, define each member's role, make program plan, coordinate each team member and follow up the progress.
2006/10—2007/05 Optimization the current Test Process Order for Flash Memory
  Project Description: To simplify the current Test procedure and enhance the working efficiency, a Task Force team has been called and started by me.
Responsibility: Being the Project leader, I take the main responsibility, such as, design, plan, organize and implement.
2006/05—2006/12 Test Yield of Flash memory Improvement
  Project Description: To improve the test yield of different products, a Task Force team was built up and led by me. Being the team leader, I worked with all team members to dig out the failure root cause for each product, defined action taken plan for each emergency case, coordinated each team member and make pro-active plan to avoided unexpected things happen.
Responsibility: Being the team leader of Improving Test Yield, coordinate each team member, make program plan and follow up.
Education and Training
2005/05—2006/01 Nanyang University of Science & Technology Microelectronics Doctorate
  I worked in Nan yang University of Science & Technology as a Research Fellow. I major at Gate oxide Reliability research in the duration.
2004/03—2005/03 Seoul National University of Korea Microelectronics Others
  I had been working in National Physical Lab of Seoul National University in Korea since March of 2004 to March of 2005 as a Post-doctor. Where I unhook the project of research & development of Carbon-Nan tube Biosensor. And only after one year, an EIS sensor based on CMOS technology has been successfully produced. And one SCI paper about it has been published in Semiconductor Science and Technology.
2001/03—2004/03 Shanghai Institute of Microsystems and Information Technology，Chinese Academy of Sciences Information Technology Doctorate
1998/09—2001/03 Nanjing University of Science & Technology Material Science and Engineering Master
  Being a master student of this period, I have published one EI paper about Super-fine metal power's electrical characteristics.
1993/09—1997/07 Nanjing University of Science & Technology Material Science and Engineering Bachelor
1997/07—1998/07 Assistant Engineer in Quality Verification Department, Boiler Factory in Zhengzhou city of Henan resistant Engineer in Quality Verification Department
Professional Skills
Language Skills： English: EXCELLENT
Korean: AVERAGE
Computer Skills： Technology   skilled 96Month
SAP   understanding 8Month
Certificate： 2000/11  MCSE
1999/06  CET6
Self-appraisal
7 years working experience of Semiconductor Industry and where 2 years overseas working/study experience. Smart working, innovation thinking and very talented creative working model.

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